SPO600 - Project Stage 1

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 In this blog, I'll go over the first stage of my SP0600 project. The first stage is dedicated to project planning. In this project, we must develop a proof-of-concept tool for creating functions using automatic vectorization. The primary goal of this project is to eliminate all of the setup performed by software developers and to automate the process through the creation of a tool. This tool allows developers to create three versions of a function, and the compiler will select one of them at runtime to generate a single output file.

The goal of this project is to create a proof-of-concept tool that will take code that meets certain criteria and automatically build it with the ifunc capability to choose between multiple, autovectorized versions of a function, allowing the code to take advantage of the best SIMD implementation available on the CPU on which it is running. 

The limitations of this project are:

  • The tool is only compatible with the aarch64 system.
  • There are only three SIMD implementations under consideration: ASIMD, SVE, and SVE2.
  • Only the second argument, which is listed above, will be built three times (function.c).
  • A single function may be included in the second argument file.

I intend to write the ifunc function in C with the resolver implemented. In the c programming language, I will create an intermediate file called "ifunc.c." The tool, on the other hand, will be written in Python. I believe I will be most at ease writing the main tool that will be used to create the ifunc.c file along with other.c and header files in Python.

Project Procedure
  • To begin, the tool will clone the second argument file (function.c) into three files, one for ASIMD, one for SVE, and one for SVE2.
  • The tool will then have to rename the functions in each of the files (function.c) so that each function is distinct from the others. The best way to accomplish this is to append a suffix to the function's name.
  • The ifunc.c file will be created in the third step. This file will contain a template in which I will replace the names of functions with the arguments.
  • The header files will then need to be added to the generated ifunc.c file. But first, I need to make an ifunc.h header file in order to keep the prototypes of the three functions.
  • I have to build them after I've created all of the files. I'll create three files for three functions based on ASIMD, SVE, and SVE2 arguments. Please see my previous blog on this link to learn more about how to build these implementations.
  • Then I have to build all three functions, along with the ifunc file, so that the compiler can choose an auto-vectorization version automatically.
I was given a set of test files in the git repository to use for testing the tool. To run the tool, go to https://github.com/ctyler/spo600-fall2022-project-test-code.

Challenges

While developing this software, I anticipate some difficulties. Firstly, my challenge will be to rename the functions and add them to the ifunc c file and header file because I have no idea how I will do that. Secondly, I might have to spend a lot of time researching the problems you're having with Arm devices. I need more time to come up with a solution because I don't feel comfortable writing SIMD, SVE, and SVE2 C functions three times in a row. Lastly, my challenge will be to test the code on israeli (aarch64) systems because the given test files contain images, and viewing images on an ssh shell requires the -X version to be initiated. 
However, I am excited to work on this project and overcome these obstacles in order to create a successful tool.

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